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	<title>Volume-1 Issue-1, March 2021 &#8211; Indian Journal of Microprocessors and Microcontroller (IJMM)</title>
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		<title>A1002031121</title>
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		<pubDate>Tue, 10 Aug 2021 06:08:25 +0000</pubDate>
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					<description><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>
<p>The post <a rel="nofollow" href="https://www.ijmm.latticescipub.com/portfolio-item/a1002031121/">A1002031121</a> appeared first on <a rel="nofollow" href="https://www.ijmm.latticescipub.com">Indian Journal of Microprocessors and Microcontroller (IJMM)</a>.</p>
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										<content:encoded><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>

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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif;"><span style="font-size: 14pt;"><strong><span style="font-size: 18pt;">Logical Fault Modelling Algorithm for Stuck-at-Faul</span><br />
</strong>K. Mariya Priyadarshini<strong><sup>1</sup></strong>, Kurra Harshitha<strong><sup>2</sup></strong>, Pritika Kanchan<strong><sup>3</sup></strong>, K. Mercy Romitha<strong><sup>4</sup></strong></span></span></p>
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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 12pt;">
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</span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 12pt;"> Manuscript received on January 01, 2021. <strong>|</strong> Revised Manuscript received on January 09, 2021. <strong>|</strong> Manuscript published on March 10, 2021. <strong>|</strong> PP: 20-23<strong> |</strong> Volume-1 Issue-1, March 2021 <strong>|</strong> Retrieval Number: A1002031121/2021©LSP<br />
</span><br />
<span style="font-size: 10pt;"> <span style="font-family: 'times new roman', times, serif;"><i class="fa fa-unlock-alt" style="font-size: 12px; color: blue;"></i><span style="font-size: 12pt;"><a href="https://www.openaccess.nl/en/open-publications" target="_blank" rel="noopener"> Open Access</a> <strong>| </strong><i class="far fa-file-alt" style="color: blue;"></i> <a href="https://www.ijmm.latticescipub.com/ethics-policies/"> Ethics and Policies</a></span></span><span style="font-size: 12pt; font-family: 'times new roman', times, serif;"> <strong> |</strong> <i class="fa fa-database" style="color: blue;" aria-hidden="true"></i><a href="https://www.ijmm.latticescipub.com/indexing/"> Indexing and Abstracting</a></span></span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 10pt;">© The Authors. Published by Lattice Science Publication (LSP). This is an <a href="https://www.openaccess.nl/en/open-publications" target="_blank" rel="noopener">open access</a> article under the CC-BY-NC-ND license (<a href="http://creativecommons.org/licenses/by-nc-nd/4.0/" target="_blank" rel="noopener">http://creativecommons.org/licenses/by-nc-nd/4.0/</a>)</span></p>
<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 14pt;"><strong>Abstract:</strong> With miniaturization happening around with the technology, it’s very important that the faults associated with these circuits to get accurate results, especially electronics circuits. Besides, finding these faults is a tough job as there will be several test inputs that needs to be tested to check the circuit is fault free or not. Stuck at line is a deficiency prototype used as a part of computerized testing circuit. When any of the line in the circuit is stuck permanently at power supply or ground giving unwanted output, this is called fault. This paper describes about a technique that can be used to find stuck at fault and display the test vectors that generates the faulty output. Any self-assertive different shortcoming in combinational and consecutive circuits can be mimicked and tried utilizing the displayed stuck at fault model. High fault coverage is especially significant during assembling test, and strategies. Stuck at fault results are presented and detected. The outcomes of single stuck at faults are presented in this paper using Verilog code.<br />
</span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 14pt;"> <strong>Keywords: </strong>Fault Detection, Test Pattern Generation, Stuck-at-fault, Single Stuck-at-fault, Fault Algorithm.</span></p>
<p>
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<p>The post <a rel="nofollow" href="https://www.ijmm.latticescipub.com/portfolio-item/a1002031121/">A1002031121</a> appeared first on <a rel="nofollow" href="https://www.ijmm.latticescipub.com">Indian Journal of Microprocessors and Microcontroller (IJMM)</a>.</p>
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					<description><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>
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										<content:encoded><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>

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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif;"><span style="font-size: 14pt;"><strong><span style="font-size: 18pt;">Gesture Controlled Robot using Accelerometer</span><br />
</strong></span><span style="font-size: 14pt; color: #000000;">Aishwarya Mohan<strong><sup>1</sup></strong>, Rashmi Priyadarshini<strong><sup>2</sup></strong></span></span></p>
<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 12pt; color: #000000;">
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<span  class='av_font_icon av-bpb0i-581c9f6616d928fec3ccaa74ff44e976 avia_animate_when_visible av-icon-style- avia-icon-pos-left avia-iconfont avia-font-entypo-fontello avia-icon-animate'><span class='av-icon-char' data-av_icon='' data-av_iconfont='entypo-fontello' aria-hidden="true" data-avia-icon-tooltip=" rashmi.priyadarshini@sharda.ac.in "></span></span></span><span style="font-family: 'times new roman', times, serif; font-size: 12pt; color: #000000;"><sup><strong>1</strong></sup>Aishwarya Mohan, Department of Electronics and Communication, Sharda University, Greater Noida, India. </span></p>
<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 12pt; color: #000000;">
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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 12pt; color: #000000;"> Manuscript received on 07 April 2021<strong> |</strong> Revised Manuscript received on 27 April 2021 <strong>|</strong> Manuscript Accepted on 15 March 2021 <strong>|</strong> Manuscript published on 30 March 2021 <strong>|</strong> PP: 16-19<strong> |</strong> Volume-1 Issue-1, March 2021 <strong>|</strong> Retrieval Number: A1005031121/2021©LSP</span><br />
<span style="font-size: 10pt; color: #000000;"> <span style="font-family: 'times new roman', times, serif;"><i class="fa fa-unlock-alt" style="font-size: 12px; color: blue;"></i><span style="font-size: 12pt;"><a href="https://www.openaccess.nl/en/open-publications" target="_blank" rel="noopener"> Open Access</a><strong> |</strong> <i class="far fa-file-alt" style="color: blue;"></i><a href="https://www.ijmm.latticescipub.com/ethics-policies/"> Ethics and Policies</a></span></span><span style="font-size: 12pt; font-family: 'times new roman', times, serif;"> <strong> |</strong> <i class="fa fa-database" style="color: blue;" aria-hidden="true"></i><a href="https://www.ijmm.latticescipub.com/indexing/"> Indexing and Abstracting</a></span></span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 10pt;">© The Authors. Published by Lattice Science Publication (LSP). This is an <a href="https://www.openaccess.nl/en/open-publications" target="_blank" rel="noopener">open access</a> article under the CC-BY-NC-ND license (<a href="http://creativecommons.org/licenses/by-nc-nd/4.0/" target="_blank" rel="noopener">http://creativecommons.org/licenses/by-nc-nd/4.0/</a>)</span></p>
<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 14pt; color: #000000;"><strong>Abstract:</strong> Robots are devices that can perform tasks with or without human intervention, based on inputs from its environment. Gestures can be explained as symbolic actions performed by humans having a meaning. In this project, a robot toy car has been developed where the user uses these very gestures to interact with the robot car rather than the established and current technology of using remote controllers with buttons and joysticks, or mobile applications. These gestures are identified with the use of an accelerometer(ADXL345). The entire project is split into two parts: the transmitter circuit and the receiver circuit, where the former uses ADXL345 for gesture recognition, and the latter uses Motor driver (L293D) to move the toy car.<br />
</span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 14pt; color: #000000;"> <strong>Keywords: </strong>ADXL345, Arduino SMD, Atmega 328p, Center Shaft DC Motor, L293D, RF Module.</span></p>
<p>
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		<title>A1004031121</title>
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		<dc:creator><![CDATA[IJMM Journal]]></dc:creator>
		<pubDate>Tue, 10 Aug 2021 05:38:22 +0000</pubDate>
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					<description><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>
<p>The post <a rel="nofollow" href="https://www.ijmm.latticescipub.com/portfolio-item/a1004031121/">A1004031121</a> appeared first on <a rel="nofollow" href="https://www.ijmm.latticescipub.com">Indian Journal of Microprocessors and Microcontroller (IJMM)</a>.</p>
]]></description>
										<content:encoded><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>

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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif;"><span style="font-size: 14pt;"><strong><span style="font-size: 18pt;">Analysis the Effect of Subthreshold Leakage on Carry Save Adder</span><br />
</strong>Sunil Kumar Ojha<strong><sup>1</sup></strong>, O.P. Singh<strong><sup>2</sup></strong>, G.R.Mishra<strong><sup>3</sup></strong></span></span></p>
<p style="text-align: justify;"><span style="font-size: 12pt;"><span style="font-family: 'times new roman', times, serif;"><sup><strong>1</strong></sup>Sunil Kumar Ojha, Department of Electronics &amp; Communication Engineering, Amity School of Engineering &amp; Technology (ASET) Amity </span><span style="font-family: 'times new roman', times, serif;">University, India.</span></span></p>
<p style="text-align: justify;"><span style="font-size: 12pt;"><span style="font-family: 'times new roman', times, serif;"><sup><strong>2</strong></sup>O.P. Singh, Department of Electronics &amp; Communication Engineering, Amity School of Engineering &amp; Technology (ASET) Amity University, </span><span style="font-family: 'times new roman', times, serif;">India.</span></span></p>
<p style="text-align: justify;"><span style="font-size: 12pt;"><span style="font-family: 'times new roman', times, serif;"><sup><strong>3</strong></sup>G.R. Mishra, Department of Electronics &amp; Communication Engineering, Amity School of Engineering &amp; Technology (ASET) Amity University, </span><span style="font-family: 'times new roman', times, serif;">India.<br />
</span></span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 12pt;"> Manuscript received on 02 April 2021 <strong>|</strong> Revised Manuscript received on 24 April 2021 <strong>|</strong> Manuscript Accepted on 15 March 2021 <strong>|</strong> Manuscript published on 30 March 2021 <strong>|</strong> PP: 12-15<strong> |</strong> Volume-1 Issue-1, March 2021 <strong>|</strong> Retrieval Number: A1004031121/2021©LSP<br />
</span><br />
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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 14pt;"><strong>Abstract:</strong> This paper analyzes the effect of subthreshold leakage on carry save adder. When the gate to source voltage reduces and goes below the threshold voltage there is still some amount of current flow inside the circuit and that is undesired for the design. As the process technology advancing much rapidly the threshold voltage of MOS devices reduces very drastically, and it must be taken care for the low power devices since it leads to small amount of leakage current which intern increases the power consumption of the devices. Adders are the basic building blocks for any digital circuit design and it is used in almost all arithmetic calculations. The CSA proves efficient adders for Digital ICs due to its fast and accurate calculations. Hence this paper perform subthreshold analysis on CSA; and the observe results shows the total average power is nearly 4.93µW, the propagation delay for complete operation is 16.3ns and since this design uses GDI cell so there is a reduction in area with 37%.<br />
</span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 14pt;"> <strong>Keywords: </strong>Subthreshold Leakage, Gate Diffusion Input (GDI), Carry Save Adder (CSA), Leakage current, Transistor Modeling.</span></p>
<p>
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		<title>A1003031121</title>
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		<dc:creator><![CDATA[IJMM Journal]]></dc:creator>
		<pubDate>Tue, 10 Aug 2021 05:24:15 +0000</pubDate>
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					<description><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>
<p>The post <a rel="nofollow" href="https://www.ijmm.latticescipub.com/portfolio-item/a1003031121/">A1003031121</a> appeared first on <a rel="nofollow" href="https://www.ijmm.latticescipub.com">Indian Journal of Microprocessors and Microcontroller (IJMM)</a>.</p>
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										<content:encoded><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>

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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif;"><span style="font-size: 14pt;"><strong><span style="font-size: 18pt;">Implementation of LED Control through IR Sensor using FPGA</span><br />
</strong>M.Bhavani<strong><sup>1</sup></strong>, B.Maha Lakshmi<strong><sup>2<br />
</sup></strong></span></span><br />
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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 12pt;">
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</span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 12pt;"> Manuscript received on 06 April 2021 <strong>|</strong> Revised Manuscript received on 24 April 2021 <strong>|</strong> Manuscript Accepted on 15 March 2021 <strong>|</strong> Manuscript published on 30 March 2021 <strong>|</strong> PP: 7-11<strong> |</strong> Volume-1 Issue-1, March 2021 <strong>|</strong> Retrieval Number: A1003031121/2021©LSP<br />
</span><br />
<span style="font-size: 10pt;"><span style="font-family: 'times new roman', times, serif;"><i class="fa fa-unlock-alt" style="font-size: 12px; color: blue;"></i><span style="font-size: 12pt;"><a href="https://www.openaccess.nl/en/open-publications" target="_blank" rel="noopener"> Open Access</a><strong> |</strong> <i class="far fa-file-alt" style="color: blue;"></i><a href="https://www.ijmm.latticescipub.com/ethics-policies/"> Ethics and Policies</a> <strong> |</strong> <i class="fa fa-database" style="color: blue;" aria-hidden="true"></i><a href="https://www.ijmm.latticescipub.com/indexing/"> Indexing and Abstracting</a></span></span></span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 10pt;">© The Authors. Published by Lattice Science Publication (LSP). This is an <a href="https://www.openaccess.nl/en/open-publications" target="_blank" rel="noopener">open access</a> article under the CC-BY-NC-ND license (<a href="http://creativecommons.org/licenses/by-nc-nd/4.0/" target="_blank" rel="noopener">http://creativecommons.org/licenses/by-nc-nd/4.0/</a>)</span></p>
<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 14pt;"><strong>Abstract:</strong> This project represents interfacing of IR sensor with the Spartan-3E FPGA board with verilog segments important to execute the desired functionality. The fundamental of the project is to build up by using the smart LED and it should be done by the remote controlling device only. The components used here are reflected by taking the readings demonstrated device, and it is used when in the lighting of a system. This proposed LED lighting system is a remotely controlled and self learning mode and it is managed by the usage of remote. This project can be mostly done by utilizing FPGA. For the most part at whatever point the remote is made on then the drove should glow else it ought to be in off condition. The circuit basically comprises of a transmitter, the collector comprising of an IR module, CD4017 IC, LED&#8217;s to show the gathering of the IR radiations, generally demonstrating the ON/OFF state, transfer and other components. The entire structure is to be actualized on FPGA board by composing a verilog code in Xilinx ISE for Binary to ASCII Decoder and subsequently the recreation results and yield on FPGA Interface with 16&#215;2 dot matrix on lcd display will be analysed.<br />
</span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 14pt;"> <strong>Keywords: </strong>FPGA, IR Sensor, LED, Verilog.</span></p>
<p>
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<p>The post <a rel="nofollow" href="https://www.ijmm.latticescipub.com/portfolio-item/a1003031121/">A1003031121</a> appeared first on <a rel="nofollow" href="https://www.ijmm.latticescipub.com">Indian Journal of Microprocessors and Microcontroller (IJMM)</a>.</p>
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		<title>A1001031121</title>
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		<dc:creator><![CDATA[IJMM Journal]]></dc:creator>
		<pubDate>Tue, 10 Aug 2021 05:12:28 +0000</pubDate>
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					<description><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>
<p>The post <a rel="nofollow" href="https://www.ijmm.latticescipub.com/portfolio-item/a1001031121/">A1001031121</a> appeared first on <a rel="nofollow" href="https://www.ijmm.latticescipub.com">Indian Journal of Microprocessors and Microcontroller (IJMM)</a>.</p>
]]></description>
										<content:encoded><![CDATA[<p>The Indian Journal of Microprocessors and Microcontroller (IJMM) has ISSN 2582-8835 (online), open-access, peer-reviewed, periodical half-yearly international journal, which is published by Lattice Science Publication (LSP) in March and September. The journal aims to publish high-quality peer–reviewed original articles in the area of Microprocessors and Microcontroller that covers ASIC, Digital Circuits and Digital Signal Processor, FPGA, Graphics Processing Units, Instruction Set Architecture, Optimizing Microarchitecture, Leveraging Software Tools, Microprocessor and Microcontroller System, Microelectronic Devices and Circuits, Programmable Logic designing, SoC, SoPC, MPoC and NoC Designing. #ASIC #Digital Circuits and Digital Signal Processor #FPGA #Graphics Processing Units #Instruction Set Architecture #Optimizing Microarchitecture #Leveraging Software Tools #Microprocessor and Microcontroller System #Microelectronic Devices and Circuits #Programmable Logic designing #SoC, SoPC, MPoC and NoC Designing #PhD ademic #Scopus #SCI #LatticeScience #Springer, #ScienceDirect #IEEE #Mendeley #Research #Scholarship #UGC #SSRN #LatticeScience #ESCI #Science #Journal #Conference #SSRN #PubLons</p>

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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif;"><span style="font-size: 14pt;"><strong><span style="font-size: 18pt;">Improvement of Wideband Spectrum sensing Reconstruction Algorithms for Wireless Networks</span><br />
</strong>T V N L Aswini<strong><sup>1</sup></strong>, Padma Raju. K<strong><sup>2</sup></strong>, Leela Kumari. B<strong><sup>3<br />
</sup></strong></span></span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 12pt;"> 
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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 12pt;">
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<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 12pt;"><strong><sup> 
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</span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 12pt;"> Manuscript received on 03 April 2021 <strong>|</strong> Revised Manuscript received on 20 April 2021 <strong>|</strong> Manuscript Accepted on 15 March 2021 <strong>|</strong> Manuscript published on 30 March 2021 <strong>|</strong> PP: 1-6<strong> |</strong> Volume-1 Issue-1, March 2021 <strong>|</strong> Retrieval Number: A1001031121/2021©LSP<br />
</span><br />
<span style="font-size: 10pt;"> <span style="font-family: 'times new roman', times, serif;"><i class="fa fa-unlock-alt" style="font-size: 12px; color: blue;"></i><span style="font-size: 12pt;"><a href="https://www.openaccess.nl/en/open-publications" target="_blank" rel="noopener"> Open Access</a><strong> |</strong> <i class="far fa-file-alt" style="color: blue;"></i><a href="https://www.ijmm.latticescipub.com/ethics-policies/"> Ethics and Policies</a> <strong> |</strong> <i class="fa fa-database" style="color: blue;" aria-hidden="true"></i><a href="https://www.ijmm.latticescipub.com/indexing/"> Indexing and Abstracting</a></span></span></span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 10pt;">© The Authors. Published by Lattice Science Publication (LSP). This is an <a href="https://www.openaccess.nl/en/open-publications" target="_blank" rel="noopener">open access</a> article under the CC-BY-NC-ND license (<a href="http://creativecommons.org/licenses/by-nc-nd/4.0/" target="_blank" rel="noopener">http://creativecommons.org/licenses/by-nc-nd/4.0/</a>)</span></p>
<p style="text-align: justify;"><span style="font-family: 'times new roman', times, serif; font-size: 14pt;"><strong>Abstract:</strong> There is a tremendous growth in wireless networks and services from the last few years, which increased the urge of radio spectrum. This paved way for the new technology named Cognitive Radio which provides a promising solution for efficient spectrum utilization. Of all the different works of CR, sensing plays a vital role. In this aspect, Compressive sensing, a new paradigm joined hands in further improving the efficiency of CR by sampling the wideband spectrum at sub-Nyquist rates. In this piece of work, proposed enhanced Orthogonal matching pursuit algorithm proved its advantages over normal OMP algorithm by extending the iterations with a run factor. Simulation results justified the increase of detection probability with the proposed algorithm.<br />
</span><br />
<span style="font-family: 'times new roman', times, serif; font-size: 14pt;"> <strong>Keywords: </strong>MWC, Spectrum Sensing, OMP, Support.</span></p>
<p>
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<p>The post <a rel="nofollow" href="https://www.ijmm.latticescipub.com/portfolio-item/a1001031121/">A1001031121</a> appeared first on <a rel="nofollow" href="https://www.ijmm.latticescipub.com">Indian Journal of Microprocessors and Microcontroller (IJMM)</a>.</p>
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